Manufacturing method of deep-trench capacitor

深沟槽电容器件的制作方法

Abstract

本申请提供了一种深沟槽电容器件的制作方法。该制作方法包括:步骤S1,在半导体衬底中形成第一深沟槽;步骤S2,在距半导体衬底表面0.3~1μm以下的第一深沟槽周围的半导体衬底中形成掩埋电极;步骤S3,在第一深沟槽中设置填充材料;步骤S4,实施CMOS前端工艺,得到位于半导体衬底上的层间介质层;步骤S5,对层间介质层进行刻蚀使填充材料裸露;步骤S6,去除填充材料,使第一深沟槽的侧壁裸露形成第二深沟槽;以及步骤S7,在第二深沟槽中设置依次远离第二深沟槽侧壁的介电材料层和上电极。采用填充材料避免了CMOS前端工艺对深沟槽结构以及介电材料层的破坏,使得所形成的介电材料层保持较高的电荷容量和稳定性。
The invention provides a manufacturing method of a deep-trench capacitor. The manufacturing method comprises the steps of S1, forming a first deep trench in a semiconductor substrate; S2, forming a buried electrode in the semiconductor substrate at the periphery of the first deep trench, wherein the first deep trench is below the semiconductor substrate and the distance between the first deep trench and the surface of the semiconductor substrate is larger than 0.3-1 [mu]m; S3, arranging a filling material in the first deep trench; S4, applying a CMOS frontend process for obtaining an interlayer dielectric layer on the semiconductor substrate; S5, etching the interlayer dielectric layer for baring the filling material; S6, removing the filling material so that the sidewall of the first deep trench is bare, thereby forming a second deep trench; and S7, arranging a dielectric material layer and an upper electrode in the second deep trench, wherein the distance between the sidewall of the second deep trench and the dielectric material layer is smaller than the distance between the sidewall of the second deep trench and the upper electrode. The manufacturing method prevents damage of a deep trench structure and a dielectric material layer by the CMOS frontend process through utilizing the filling material so that the formed dielectric material layer has relatively high charge capacity and relatively high stability.

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